Wafer
IC Packaging
Polished Wafer
LED Chip
Ultra-pure Chemicals
The semiconductor ultrapure water (UPW) system represents the most complex design and precise operational control in industrial water treatment.
In semiconductor manufacturing, over 80% of processes rely on chemical treatments where UPW is indispensable.
Any impurity can penetrate silicon wafers during high-temperature stages, leading to performance degradation and low yield rates.
Our systems deliver resistivity ≥ 18.2 MΩ·cm, approaching the theoretical limit of 18.3 MΩ·cm,
with strict control over particles (≤ 0.05μm) to meet the rigorous demands of advanced lithography.
We classify our semiconductor solutions into five core subsystems: Pre-treatment, Deionized Water (DI), Pure Water, Polishing Loop, and Reclamation.
Ultrapure Water for Wafer & SiC Substrate Manufacturing
The Challenge: Achieving Defect-Free Surfaces on SiC Wafers
Silicon Carbide (SiC) is essential for high-power electronics, yet its extreme hardness and chemical inertness pose significant cleaning challenges. Post-CMP (Chemical Mechanical Polishing) cleaning is the most critical step in substrate preparation.
- Persistent Contamination: Post-CMP surfaces exhibit strong fractured bond forces, easily adsorbing silica colloids, abrasives, metallic ions, and organic films.
- Organic Masking: The Si-face of SiC wafers is often masked by organic matter, making it extremely difficult to remove underlying oxide layers.
- Epitaxial Readiness: Any residual particles or moisture molecules will prevent the acquisition of high-quality epitaxial layers, leading to device failure.
The Conclusion
“Ultra-clean, smooth, and defect-free surfaces are the prerequisites for next-generation SiC devices. High-resistivity Ultrapure Water (UPW) rinsing is the indispensable link to ensuring the removal of all organic and inorganic impurities.”
Our Solution: High-Precision UPW Process Flows
We provide EPC partners with three specialized, scalable process configurations for semiconductor wafer lines:
- Process 1: MMF + ACF + 2B3T + RO + MB + 2SMB
- Process 2: ROC + TGM + 2SMB + UF
- Process 3: HEX + MDG + UV + MF + 2EDI + MB + HEX + MDG + TOC + 2SMBB + 2UF
- Manufacturing Power: Engineered in our 50,000 SQM facility to ensure rapid delivery and consistent quality for international supply chains.
Ultrapure Water for Semiconductor IC Packaging and Wafer Processing
The Challenge: Contamination Control in IC Manufacturing and Packaging
In the production of integrated circuits (IC), including IC packaging, ultrapure water (UPW) is essential for cleaning most processes. During wafer thinning and dicing, UPW plays a critical role in removing silicon dust impurities. However, even trace amounts of impurities in the water could re-contaminate the chips, impacting the quality of the packaged ICs.
- Increased Integration Demands: As the integration level of ICs increases, the requirements for water purity become more stringent. Water quality parameters need to be constantly reduced as IC designs evolve.
- Water Impurities: Impurities like TOC (Total Organic Carbon), SiO2, DO (Dissolved Oxygen), and ionic contaminants must be minimized to ensure high-quality IC packaging.
- Impact on IC Quality: Trace impurities in ultrapure water, especially TOC, can cause defects in thin gate oxide films, affecting the overall performance of the ICs.
The Conclusion
“As IC design rules continue to shrink from 1.5μm to 0.25μm, the requirements for ultrapure water have become more demanding. The main challenge now is lowering the TOC levels, which directly impacts the performance of thin gate oxide films. Meeting these stringent requirements is essential for the next generation of semiconductor ICs.”
Our Solution: Tailored UPW Process Flows for IC Packaging
We offer three specialized process flows to meet the demanding requirements of semiconductor IC packaging and wafer processing:
- Process 1: MMF + ACF + 2B3T + RO + MB + 2SMB
- Process 2: ROC + TGM + 2SMB + UF
- Process 3: HEX + MDG + UV + MF + 2EDI + MB + HEX + MDG + TOC + 2SMBB + 2UF
- Manufacturing Power: Engineered in our advanced facilities to provide rapid delivery and consistent quality for global supply chains.
Ultrapure Water for SiC Polishing and Wafer Processing
The Challenge: Contamination Control in SiC Polishing
Silicon Carbide (SiC) is known for its wide bandgap, high breakdown field, high thermal conductivity, low thermal expansion coefficient, and high-temperature stability, making it crucial for high-power and high-temperature electronics. For high-performance commercial devices, SiC substrates require defect-free and ultra-clean surfaces. After Chemical Mechanical Polishing (CMP), SiC wafers often retain silicon colloids, chemicals, and abrasives, which pose challenges for achieving a clean, smooth surface necessary for high-quality epitaxial layers.
- High Hardness and Chemical Inertness: The high hardness and chemical inertness of SiC make it difficult to remove residual contaminants from the wafer surface.
- Contaminant Retention: After CMP, the wafer’s surface bond strength is high, making it prone to adsorbing particles, metals, organic materials, moisture molecules, and oxide films.
- Surface Contamination: Organic substances on the Si-face of the SiC wafer can mask oxide layers, making it difficult to remove underlying contaminants.
The Conclusion
“Ultrapure Water (UPW) cleaning is an indispensable step in the manufacturing of polished SiC wafers. It ensures the removal of all contaminants such as particles, organic matter, inorganic substances, and metal ions from the wafer surface, which is essential for achieving high-quality epitaxial layers for subsequent semiconductor devices.”
Our Solution: Tailored UPW Process Flows for SiC Polishing
We provide customized ultrapure water cleaning solutions for SiC wafer polishing, with three specialized process flows:
- Process 1: MMF + ACF + 2B3T + RO + MB + 2SMB
- Process 2: ROC + TGM + 2SMB + UF
- Process 3: HEX + MDG + UV + MF + 2EDI + MB + HEX + MDG + TOC + 2SMBB + 2UF
- Manufacturing Power: Our facilities are engineered for rapid delivery and consistent quality, supporting the global semiconductor industry with high-volume production.
Ultrapure Water for LED Chip Manufacturing
The Challenge: Contamination Control in LED Chip Fabrication
The process of manufacturing LED chips can be broken down into two main parts. The first involves the creation of Gallium Nitride (GaN)-based epitaxial wafers, usually carried out in a Metal-Organic Chemical Vapor Deposition (MOCVD) reactor. The second part involves processing the LED’s PN junctions, which include key steps like cleaning, metal deposition, etching, and grinding. However, contamination during any of these steps, especially during cleaning and deposition, can lead to defects such as metal layer delamination, discoloration, or bubbles, impacting the quality of the final LED chip.
- Contamination Risks: Inadequate cleaning or improper metal deposition can result in defects in the metal layers of the LED chip, causing functionality issues or aesthetic defects.
- Critical Process Stages: The MOCVD process for GaN epitaxial wafer production and the subsequent electrode processing are highly sensitive to contamination, with strict requirements for water purity.
- Impact of Contaminants: Contaminants such as organic materials, metal ions, and particles can significantly affect the quality of both the GaN epitaxial layer and the final LED chip.
The Conclusion
“To achieve high-quality LED chips, controlling contamination during the production process is essential. Using ultrapure water (UPW) to clean substrates, wafers, and electrodes helps remove contaminants like particles, organic compounds, and metal ions, ensuring a defect-free LED chip that performs reliably.”
Our Solution: Tailored UPW Process Flows for LED Chip Manufacturing
We offer three specialized ultrapure water cleaning process flows for LED chip fabrication to ensure the highest quality standards:
- Process 1: MMF + ACF + 2B3T + RO + MB + 2SMB
- Process 2: ROC + TGM + 2SMB + UF
- Process 3: HEX + MDG + UV + MF + 2EDI + MB + HEX + MDG + TOC + 2SMBB + 2UF
- Manufacturing Power: Our advanced facilities ensure rapid deployment, consistent quality, and scalability to support the global LED industry.
Ultrapure Chemical Reagents for IC Manufacturing
The Challenge: Ensuring Purity in Ultra-Clean Chemical Reagents
Ultrapure high-purity (VLSD) reagents are specialized chemicals used in the production of large-scale integrated circuits (ICs) and high-end semiconductor devices. These reagents are primarily used in silicon wafer cleaning, photolithography, and etching processes. The purity and cleanliness of these chemicals directly impact the yield, electrical performance, and reliability of integrated circuits. With the increasing integration of ICs, the demand for higher-quality chemical reagents is more critical than ever, as impurities in these chemicals can severely affect the final product quality.
- Increasing Purity Demands: As IC technology advances, stricter purity standards are required for ultra-pure chemicals to meet the demands of next-generation manufacturing processes.
- International Standards: The Semiconductor Industry Association (SIA) has set new reagent quality standards, such as Semi C7 and Semi C8, to accommodate different process technologies.
- Local Standards: In China, ultra-pure chemicals are categorized into several quality grades, such as Low-Dust High-Purity, MOS Grade, BV-I Grade, and BV Dish Grade, which are equivalent to Semi C7 standards.
The Conclusion
“As the semiconductor industry continues to evolve, ensuring the purity of ultra-clean chemical reagents is vital for achieving high IC yield and reliability. By meeting international and local standards, these reagents ensure high-quality manufacturing and improved performance in advanced IC and semiconductor device production.”
Our Solution: Tailored UPW Process Flows for Ultra-Clean Chemicals
To ensure the highest quality of ultrapure chemical reagents, we offer three specialized ultrapure water (UPW) cleaning processes to meet the stringent demands of semiconductor production:
- Process 1: MMF + ACF + 2B3T + RO + MB + 2SMB
- Process 2: ROC + TGM + 2SMB + UF
- Process 3: HEX + MDG + UV + MF + 2EDI + MB + HEX + MDG + TOC + 2SMBB + 2UF
- Manufacturing Power: Our state-of-the-art facilities ensure rapid and reliable delivery, meeting the needs of the global semiconductor and IC industry with consistently high-quality products.
Wafer Fab 2B3T + RO + MB UPW System
CUB PRE-TREATMENT · PCW SECONDARY TREATMENT · FAB POLISHING LOOP · POINT OF USE
